IBM and AMD announced this week that they have jointly developed a strained silicon transistor technology that improves processor performance and power efficiency. The new development enhances transistor speed by 24% over similar transistors without increasing power consumption.

 

The announcement puts IBM and AMD a step ahead in the semiconductor industry's latest race to develop technological tricks that facilitate better performance and minimize power consumption.

 

In many ways, chip miniaturization is still the name of the game in the semiconductor industry, but as transistors are designed at increasingly smaller dimensions, problems with electricity leakage and inefficient switching arise. IBM and AMD have tackled the challenges presented by heat dissipation and excessive power consumption with a unique method that combines strained silicon with SOI (Silicon-on-Insulator) technology.

 

By stretching silicon atoms in one transistor and compressing them in the other, the new strained silicon process, known as Dual Stress Liner, can improve n-channel and p-channel transistor performance at the same time. IBM and AMD are the first to simultaneously boost performance for both n-channel and p-channel transistors drawing from conventional materials alone. The technology does not require costly new production methods, and it uses only standard tools and materials. As a result, IBM and AMD have integrated the Dual Stress Liner technology into their manufacturing processes with remarkable speed.

 

AMD has indicated that it plans to gradually incorporate the new strained silicon technology into all of its 90nm processor platforms, including the multi-core Opteron 64 processors that are slated to begin shipping in the first half of 2005. IBM, likewise, will unveil the Dual Stress Liner technology in the first half of 2005 alongside the new Cell processor. Several of IBM's 90nm processor platforms will feature the strained silicon technology with the company's Power Architecture chips. IBM and AMD's collaboration on semiconductor R&D has been ongoing since January 2003.